Leaping before I look

Started by MicroNut, Aug 15, 2026, 12:31 PM

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MicroNut

I've got myself into a bad habit that leads me into constant frustration. Researching as I develop a project. Usually there is some chasm to fall into along the way. So here is my long winded rant. Thx for reading it

I got into the bad habit during my 18 years of working on the same code at work. My boss gives tells me a customer wants a certain feature and with very little research I dive head first into it and in 2 or 3 days I have it done.

For my hobby projects I try the same thing. I don't have the time to research and by the end of the day my mind is so muddled by programming I need to look at my driver's license to know who I am. So I look for easy shortcuts. Wrong!

My current goal is to have an emulated Z80 with proper timing in a free logic simulator that can export verilog for a fpga. I decided on either Digital or Logisim but neither have a Z80 project. so here are my attempts:

1. Reverse engineer from an existing fpga Z80 softcore. The one I see that showed promise was the A-Z80. It was reversed engineered from the actual die. The project is very well documented with pdfs of the logic blocks that makes up the Z80. Perfect! So I started the Diving Deeper project. When I got to the logic for decoding opcodes I hit a dead end. The designer used python to generate a matrix in verilog not logic blocks. This meant decoding the matrix into logic blocks from verilog. I don't have the time. It may still be a possibility since he did make a die level simulator that would help in the understanding of the matrix.

2. Use AI with the logic simulator to design the Z80. I used Claude and ChatGPT. It could analyze the Digital and Logisim files well enough but when it came to generate files a toddler could do better. So with guidance I started making a Z80 in Digital. After working with it for a little while I asked Claude if the timing is correct. The answer was no. Plus the flow of of the design wasn't consistent. It would tell me the next step then once I finished the current step the next step could change.

3. Try something simpler. I tried the Cosmac 1802 since the DE10-Lite almost looks like an Elf board. Same results as 2.

4. Follow a known project to get a better understanding. I found an ebook with a custom cpu designed in Logisim  and ported over to an FPGA. I decided to port the project from Logisim to Logisim-Evolution since that has a easier migration to FPGA. I got the project to work with the test example in the book but found the assembler was written in Excel with macros. Neither Libre-Office or Open-Office can run the macros. I could build an assembler by reverse engineering the vba macro.

These are not failures since I've learned how to use simulators and a step by step approach to do this so I guess this would be the research phase. So now to assemble all the documentation on the Z80. write out the scope of the project and a step by step on each component then test each thoroughly before the next step. I'll be using Logisim evolution, Claude and patience to make this successful.

Once I finish the documentation I'll post it on the projects forum
Always looking to the stars.

granz

Quote from: MicroNut on Aug 15, 2026, 12:31 PM3. Try something simpler. I tried the Cosmac 1802 since the DE10-Lite almost looks like an Elf board. Same results as 2.
If you are willing to go back to step 3 and try again, maybe something simpler would work.

1 - You could try the CardIAC. I have posted about this simple, cardboard computer many times. It is a very simple architecture, and I actually wrote a simulator for this in HP2000 TSB (Time Share BASIC,) while still in high school.
links:
https://en.wikipedia.org/wiki/CARDboard_Illustrative_Aid_to_Computation
https://www.cs.drexel.edu/~bls96/museum/cardiac.html
https://www.instructables.com/CARDIAC-CARDboard-Illustrative-Aid-to-Computation-/

2 - For an even simpler architecture, you could look into URISC (the Ultimate Reduced Instruction Set Computer) from Dr. Jones, or University of Iowa. This CPU can be built with only a handful of 74XX chips, yet is fully Turing complete.

Perhaps completing something this simple will give you pointers to help guide you in your more complex projects.

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